|
|
|
Categories
|
|
Information
|
|
Featured Product
|
|
|
 |
|
|
There are currently no product reviews.
 ;
Simple and fast...
The diagrams are clear and legible; i have been a great help.
The site is very reliable and precise thanks.
 ;
Very easy site. Great service and quick release for download. Manuals are of good quality.
Joop - The Netherlands
;
Very good manual, in depth and complete. Only criticism is that some of the circuit diagrams are slightly blurry and hard to follow for long periods of time, but this is to be expected. Perfect for any maintenance required. Also contains the wiring diagrams of the control cable for constructing extensions.
;
Received a quick response, material was exactly what it was supposed to be. The service did everything I expected it to do. would use service again.
;
Detailed SONY CFD980 Service Manual at an easy to find one stop shopping. Make my radio hobby technically interesting. Thanks.
Glossary-1240
Service Vol. II
GLOSSARY (cont.)
SIGNAL NAME DESCRIPTION
TEST(L)
The I/O Processor Board�s signal line used to check the ability of the 280 CPU to write a value out to the board edge connector and correctly read it back. Also, the 9-Channel�s strobe signal derived from Control Processor control lines; used for gating probe and board I.D. data through the Status Monitor. The acquisition board T clock falling edge indicator; active when the probe C/Q line goes from a logic 1 to logic 0. The Trigger�s load signal for control RAMS containing sequence commands for true and false conditions. The 9-Channel�s threshold write signal derived from Control Processor control lines; used when setting the 9-Channel�s threshold setting. The 18-Channel�s threshold write signal derived from Control Processor control lines; used when setting the 18-Channel�s threshold setting. The 18-Channel�s timebase selection programming strobe. The Display Board�s timing diagram data signal carrying serial data to the Timing Diagram ROM. Also the 9-Channel�s signal derived from Control Processor control lines; used as a write strobe for loading timing control values. The Display Board�s timing mode signal used to indicate the display is currently generating timing diagrams. Trigger Position signals from the trigger circuitry located on the Control Processor to the Trigger Board; indicates zero detection (where zero is the trigger location). Trigger position indicator 1 and 2 ripple clock signals from the Trigger Board to the Control Processor Board; used to clock upper 8 bits. The Trigger�s master reset signals for the Trigger Position Indicator counters. The Trigger�s control signal used to specify glitches on the Test Pattern Generator. The Trigger�s control signal used to specify either T1 (true) or 12 MHz (false) as the base clock for the Test Pattern Generator. The Trigger�s T1 signal for the Test Pattern Generator clock in TPG modes 2 and 3. The Trigger�s TPI 1 and 2 prescale readback.
TFA LLING(L) TF RAM(L) THRESH(L)
THRESH(H)
TIMEBASE(L) TIMING(H)
TM 0DE(L) TPl(L), TP2(L)
TPIl(H), TP12(H)
TPI1, TP12 RESET(H) TPG GL(L) TPG Tl(H) TPG T1 CLK(H) TPRO-7(H)
12-14
|
|
|
> |
|
