|
Who's Online
There currently are 5851 guests online.
|
Categories
|
Information
|
Featured Product
|
|
|
|
|
There are currently no product reviews.
;
Found website easy to use and manual very clear. First class service
;
The quality is quite good and clear. Nothing of the informations inside is lost during the digitalizing process
;
Very good service, fast downloads and good manuals.
;
Good qulity. Even as it is an old manual (from 1991-1992) it has a good scanned quality and is complete, including user's manual, disassembly intructions, diagrams and schematics, ajustments, troubleshooting and parts list, as usual with SONY manuals and Owner-manuals service.
;
tres bon document
cela a permis de verifier la connection de l'ecran
merci
salutations
3. Phase Comparator Circuit The PLL (IC116) uses the reference frequency, 5 or 6.25 kHz. The phase comparator in the IC116 compares the phase of the frequency from the VCO with that of the comparison frequency, 5 or 6.25 kHz, which is obtained by the internal divider in IC116. 4. PLL Loop Filter Circuit If a phase difference is found in the phase comparison between the reference frequency and the VCO output frequency, the charge pump output (pin 13) of IC116 generates a pulse signal, which is converted DC voltage by the PLL loop filter and input to the input to the variable capacitor of the VCO unit for oscillation frequency control. 5. VCO Circuit
A Colpitts oscillation circuit driven by Q131 directly oscillates the desired frequency. The frequency control voltage determine in the CPU (IC1) and PLL circuit is input to the variable capacitor (D122 and D123). This change the oscillation frequency, which is amplified by the VCO buffer (Q134) and output from the VCO area.
6. VCO Shift Circuit
During transmission or the AIR band Reception (118 ~ 136 MHz), the VCO shift circuit turns ON Q138, change control the capacitance of L123 and safely oscillates the VCO by means of H signal from pin 16 of IC116.
4) Receiver System DR-435
The receiver system is a double super-heterodyne system with a 30.85MHz first IF and a 455kHz second IF.
1. Front End
The received signal at any frequency in the 430.000MHz to 449.995MHz range is passed through the low-pass filter ( L115, L114, L116, C204, C203, C202, C216 and C215) and amplified by the RF amplifier (Q107). The signal from Q107 is then passed through the BPF circuit (L103, L102) and converted into 30.85MHz by the mixer (Q106). The local signal from the VCO is passed through the buffer (Q503, Q504), and supplied to the source of the mixer (Q106). The radio uses the lower side of the super-heterodyne system.
2. IF Circuit
The mixer mixes the received signal with the local signal to obtain the sum of and difference between them. The crystal filter (XF101) selects 30.85 MHz frequency from the results and eliminates the signal of the unwanted frequencies. The first IF amplifier (Q105) then amplifies the signal of the selected frequency.
6
|
|
|
> |
|