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The AKAI 1720 model reel to reel tape recorder described in this Manual is quite an old unit - circa late 1960's. As a consequence, the description of the mechanical details - and adjustments thereof - is quite critical. The manual does this quite well. The schematics are also well presented and have detailed PCB overlays. Probably the only negative is that some half-tone detail has been lost from the original manual as it has been scanned in simple B&W.
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Excellent printing quality.
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5
6
7
8
Step 7: 1st DSP f
CN401 (Pin 20) RESET
j
CN401 (Pin 16)
For the following diagnosis, a digital oscilloscope must be used. SPICLK
A
Is the logic of RST_1 "H" ?
No
Check the output from the DIGITAL MOTHER Assy.
w
Yes R139
Is the clock signal output while the voltage at SPIDS_1 is "L"?
No
Check the output from the DIGITAL MOTHER Assy.
y
Yes R144
Is the logic of RST_1 "H" ? Yes
No
Check the resistors and patterns in the path.
Is the clock signal output while the voltage at SPIDS_1 is "L"?
No
Check the resistors and patterns in the path.
B
Is the logic of RST_1 maintained at "H"? (Does it fall to become "L" periodically?)
k
No It is likely a boot error. (It is very difficult to diagnose which peripheral part of the DSP is in failure.)
Yes CN401 (Pin 19) MOSI
g
Yes R134 REQ_1
Is the clock signal output while the voltage at SPIDS_1 is "L"?
No
Check the output from the DIGITAL MOTHER Assy.
C
z
Does the logic become "H" for a moment when the input stream is changed? No The 1st DSP is in failure. Replace it.
Yes R146
g
Yes CN401 (Pin 21)
Is the clock signal output while the voltage at SPIDS_1 is "L"?
No
Check the resistors and patterns in the path.
AA
Does the logic become "H" for a moment when the input stream is changed? No Check the resistors and patterns in the path.
Yes R142 MISO
h
Yes CN401 (Pin 17) SPIDS_1
Is the clock signal output while the voltage at SPIDS_1 is "L"?
D
No The 1st DSP is in failure. Replace it.
i
Does the logic become "L" for a moment when the input stream is changed? No Check the output from the DIGITAL MOTHER Assy.
Yes CN401 (Pin 18)
x
Yes R137
Is the clock signal output while the voltage at SPIDS_1 is "L"? Yes
No
Check the resistors and patterns in the path.
E
Does the logic become "L" for a moment when the input stream is changed? Yes
No
Check the resistors and patterns in the path.
It is very difficult to diagnose which part is in failure.
F
VSX-LX70
5 6 7 8
35
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