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AIWA XPV706
Service Manual


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  • Contains Circuit Diagrams
  • Download
  • PDF Format
  • Complete manual
  • Language: English
Price: $4.99

Description of AIWA XPV706 Service Manual

Complete service manual in digital format (PDF File). Service manuals usually contains circuit diagrams, printed circuit boards, repair tips, wiring diagrams, block diagrams and parts list. Service Manual ( sometimes called Repair Manual ) is used mainly by technicians.

If You just want to know how to use Your tv, video, mp3 player etc. You should look for Owner's Manual. After placing order we'll send You download instructions on Your email address.

The manual is available in languages: English

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Text excerpt from page 19 (click to view)
Pin No.
51 52 53 I I I

Pin Name AVDD1 FSEL TMOD1 TMOD2 FLAG (NC) ] FCLK (NC)
EXTO-2

I

I/o
I \ I I I

Description powersupplyformdogcircuit(foraudiooutput). InputnoisefilterON/OWswitcting.L:ON.H:OW. Terminalmodeswitchinginputl.Normally:L. Terminalmodeswitchinginput2,Normally:L. Flag signal output. (Not connected) ] Cwstal frame clock signal output (fFCLK=7.35kHz). (Not connected) Expansion input I output port 0-2. Digital audio interface output signal. (Not connected) Microcomputer command clock signal input (latch data at rising edge). Microcomputer command data signal input. I Microcomputer command load signal input. L: Load Input sub code block clock signal (fBLKCK = 75kHz) / Input SYNC signal for CDTEXT (fDQSY = 300kHz). 1 I 1 1 I I

I\

~I ] I o ]O
I/o

54 55 56
57-59

I

60 61 62 63 64
65

TX (NC) MCLK MDATA I MLD BLKCK
SQCK

o 1 I II I
I

Input clock for sub code Q register. Output sub code Q data. Input mute. H: Mute. Output status signal (CRC,RESY,CLVS,NTI�STOP,SQOK,FLAG6,SENSE,NFLOCK, NTLOCK,BSSEL,SUBQDATA,CDTEXT DATA,ANT-SHOCK READ OUT DATA.

66 67 68 69
70

SUBQ DMUTB STAT NRST CSEL \ PMCK (NC) SMCK SUBC (NC) SBCK NCLDCK (NC) NTEST xl
x2

o
I

o
I I ]O I

Input reset. L: Reset. Test terminal. Normally: L. 88.2kHz clock signal output. (Not connected) 4.2336MHz clock signal output. Output sub code serial. (Not connected) Input clock for subcode serial. Sub code frame clock signal output ( fCLDCK = 7.35kHz). (Not connected) Test terminal. Normally: H. Crystal oscillator circuit input terminal (f= 16.9344MHz). Crystal oscillator circuit output terminal (f= 16.9344MHz). Power supply for digital circuit. Ground for digital circuit. I

71
72

o o
I

73 74 75 76 77 78 79 80

o
I I
o

DVDD1 DVSS1

-27-

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